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Multi-core systems are adopted quickly in the automotive domain, Proof of concepts have been implemented for power train, body and chassis, involving hard real-time constraints. However, depending on the degree of integration, it can be costly, especially in those cases where existing single-core software has to be migrated over. Furthermore, there seems to be a high level of uncertainty, whether a found solution, with regards to partitioning, mapping and orchestration of software is close to an optimum solution. Some integrated solutions demonstrate considerably less performance, for instance due to communication overhead compared to execution on single-core systems. This paper discusses a methodology, as to how to effectively and efficiently investigate the software architecture design space for multi-core software development.

The constant motivation for lower fuel consumption and emission levels has always been in the minds of most auto makers. Therefore, it is important to have precise control of the fuel being delivered into the engine. Gasoline Port fuel injection has been a matured system for many years and cars sold in emerging markets still favor such system due to its less system complexity and cost. This paper will explain injection control strategy of today during development, and especially the injector dead-time compensation strategy in detail and how further improvements could still be made. The injector current profile behavior will be discussed, and with the use of minimum hardware electronics, this paper will show the way for a new compensation strategy to be adopted.

Two models for the forecast of road traffic emissions, independently developed in parallel, are comparatively presented and assessed: EPROG developed by BMW and enlarged by VDA for a national application (Germany) and FOREMOVE, developed for application on European Community scale. The analysis of the methodological character of the two algorithms proves that the models are fundamentally similar with regard to the basic calculation schemes used for the emissions. The same holds true as far as the significant dependencies of the emission factors, and the recognition and incorporation of the fundamental framework referring to traffic important parameters (speeds, mileage and mileage distribution etc) are concerned.

In the present work we investigated experimentally and computationally the unsteady flow around a BMW car model including wheels*. This simulation yields mean flow and turbulence fields, enabling the study aerodynamic coefficients (drag and lift coefficients, three-dimensional/spatial wall-pressure distribution) as well as some unsteady flow phenomena in the car wake (analysis of the vortex shedding frequency). Comparisons with experimental findings are presented. The computational approach used is based on solving the complete transient Reynolds-Averaged Navier-Stokes (TRANS) equations. Special attention is devoted to turbulence modelling and the near-wall treatment of turbulence. The flow calculations were performed using a robust, eddy-viscosity-based ζ - ƒ turbulence model in the framework of the elliptic relaxation concept and in conjunction with the universal wall treatment, combining integration up to the wall and wall functions.

Vehicle manufacturers are challenged by rising costs for vehicle recalls. A major part of the costs are caused by software updates. This paper describes a feasibility study on how to implement software update over the air (SOTA) in light vehicles. The differences and special challenges in the automotive environment in comparison to the cellular industry will be explained. Three key requirements focus on the drivers’ acceptance and thus are crucial for the vehicle manufacturers: SOTA must be protected against malicious attacks. SOTA shall interfere as little as possible with the availability of a vehicle. Long update processes with long vehicle downtimes or even complete fails must be avoided. The functional safety of the vehicle during operation may not be limited in any way The study gives options how those objectives can be achieved. It considers the necessary security measures and describes the required adaptations of the board-net architectures both on software and hardware level.

The increasing complexity of communication protocols for asynchronous multiplex systems requires the use of simulation during the optimisation of these protocols or the integration of other control units. Consideration of realistic communication behaviour of the connected control units is essential for performance analysis of multiplex systems. For a first pass, the use of simple statistical distributions (e.g. Poisson distribution) is suitable to get some simulation results. A better way to get realistic results is the approximation of empirical communication data through the use of more complex statistical distribution (e.g. mixed Erlang distributions). In this paper several approaches for the approximation of empirical data are presented. Beside simple statistical distributions (with one parameter), the use of more complex statistical distributions is discussed and methods for the identification of their parameters are presented.

The powertrain module is being introduced to embedded System on Chips (SoCs) designed to increase available computational power. These high-performance SoCs have the potential to enhance the computational power along with providing on-board resources to support unexpected feature growth and on-demand customer requirements. This project will investigate the radial basis function (RBF) using the Gaussian process (GP) regression algorithm, the ETAS ASCMO tool, and the hardware accelerator Advanced Modeling Unit (AMU) being introduced by Infineon AURIX 2nd Generation. ETAS ASCMO is one of the solutions for data-driven modeling and model-based calibration. It enables users to accurately model, analyze, and optimize the behavior of complex systems with few measurements and advanced algorithms. Both steady state and transient system behaviors can be captured.

Introduction The introduction of Ethernet and Gigabit Ethernet [2] as the main invehicle network infrastructure is the technical foundation for different new functionalities such as piloted driving, minimizing the CO2- footprint and others. The high data rate of such systems influences also the used microcontrollers due the fact that a big amount of data has to be transferred, encrypted, etc. Figure 1 Motivation - Vehicles will become connected to uncontrolled networks The usage of Ethernet as the in-vehicle-network enables the possibility that future road vehicles are going to be connected with other vehicles and information systems to improve system functionality. These previously closed automotive systems will be opened up for external access (see Figure 1). This can be Car2X connectivity or connection to personal devices. Allowing vehicle systems to communicate with other systems that are not within their physical boundaries impose a previously non-existing security problem.

The automotive industry experiences a major change as vehicles are gradually becoming a part of the Internet. Security concepts based on the closed-world assumption cannot be deployed anymore due to a constantly changing adversary model. Automotive Ethernet as future in-vehicle network and a new E/E Architecture have different security requirements than Ethernet known from traditional IT and legacy systems. In order to achieve a high level of security, a new multi-layer approach in the vehicle which responds to special automotive requirements has to be introduced. One essential layer of this holistic security concept is to restrict non-authorized access by the deployment of embedded firewalls. This paper addresses the introduction of automotive firewalls into the next-generation domain architecture with a focus on partitioning of its features in hardware and software.

Autonomous driving systems and connected mobility are the next big developments for the car manufacturers and their suppliers during the next decade. To achieve the high computing power needs and fulfill new upcoming requirements due to functional safety and security, heterogeneous processor architectures with a mixture of different core architectures and hardware accelerators are necessary. To tackle this new type of hardware complexity and nevertheless stay within monetary constraints, high performance computers, inspired by state of the art data center hardware, could be adapted in order to fulfill automotive quality requirements. The European Processor Initiative (EPI) research project tries to come along with that challenge for next generation semiconductors. To be as close as possible to series development needs for the next upcoming car generations, we present a hybrid semiconductor system-on-chip architecture for automotive.

New generation microcontrollers for automotive applications require a huge number of I/Os, dealing with various sensor and actuator signals derived from the external world. In case of the first TriCore™ based 32-Bit microcontroller this leads to approximately 270 I/Os for signal processing. Adding the power supply lines and thermal balls, the overall number of required interconnects grows far over 300. To outperform standard microcontroller packages, e.g. QFPs, the limitations in terms of package size and maximum number of interconnects have to be improved. Main goal is to adapt the component quality to the high level reliability standard, which is the basis of an implementation into automotive parts. Current tests with a P-BGA standard package show interesting results for the board level reliability, when design and test parameters are changed only slightly.

The electrification of the powertrain is still one of the main challenges and innovation drivers for modern cars. With the introduction of the Toyota Prius, launched in Japan in 1997 the first commercially available hybrid car in mass production, the development continued towards the BMW i3 launched in July 2013. One main component for all kind of hybrid cars is still the power semiconductor, which is used for DC/DC converters and for the inverter to drive the electric motor for the traction control. What makes the selection of the right power semiconductor complex, is the variety of different voltage levels within the car (from standard 12V board net, the new 48V board net all the way up to 400V and above) plus different requirements in terms of switching and conduction performance, or accordingly power losses. The selection of device by application and voltage will be discussed in this paper.

The German funded project ARAMiS included work on several demonstrators one of which was a multicore approach on large scale software integration (LSSI) for the automotive domain. Here BMW and Audi intentionally implemented two different integration platforms to gain both experience and real life data on a Hypervisor based concept on one side as well as using only native AUTOSAR-based methods on the other side for later comparison. The idea was to obtain figures on the added overhead both for multicore as well as safety, based on practical work and close-to-production implementations. During implementation and evaluation on one hand there were a lot of valuable lessons learned about multicore in conjunction with safety. On the other hand valuable information was gathered to make it finally possible to set up a cost model for estimation of potential overhead generated by different integration approaches for safety related software functions.

The verification of an in-vehicle network often requires to look at more than one level of abstraction at a time. At the moment, this is not addressed by existing methods, which are dedicated either to physical or application layer, but not both. This paper fills this gap by introducing a methodology to insert the protocol related software execution as well as the motor behavior into the physical layer mixed-signal (i.e. analog/digital) simulation. Electronics and mechanics are covered by the hardware description language VHDL-AMS, while the software is given in C.

When investigating the posture comfort in vehicles two important influencing factors can be distinguished: In order to evaluate these influences a combined laboratory-field-experiment was carried out. A real car was equipped with cameras to record the body posture and the joint angles. The static forces exerted by the driver on his contact points were recorded in a corresponding mock-up. The forces to maintain the body posture were calculated. The following results were found:

The concept of “Simulatable Specifications” is applied to a Smart Bridge-Driver-IC in order to support an integrated development process of a Direct Injection System. It is demonstrated that the impact of the IC concept on system performance can be investigated long before first Silicon is available. Thus, considerable time in systems development can be saved and, in addition, the feedback loop for conceptual redesigns of the chip is reduced by up to 60 percent.

The environmental impact of the automobile and its components is of growing importance not only in public debates but also in the complex decision making process regarding future car concepts. To calculate the environmental compatibility of car components BMW has developed various quantifying instruments and a holistic Life-Cycle Analysis (LCA) approach. The development phase significantly affects the entire life-cycle of a product. Suitable design criteria, recycling requirements and in-house standards have therefore been developed and established. One of the most important objectives in optimizing the environmental compatibility of the automobile is the realization of intelligent lightweight concepts. This means one has to find the most appropriate solution in terms of ecology and economy. Due to modern development processes car manufacturers and their suppliers have to intensify their cooperation also in this area.

For the past approximately 20 years, the Serial Peripheral Interface (SPI) has been the established standard for serial communication between a host or central microprocessor and peripheral devices. This standard has been used extensively in control modules covering the entire spectrum of automotive applications, as well as non-automotive applications. As the complexity of engine control modules grows, with the number of vehicle actuators being controlled and monitored increasing, the number of loads the central microprocessor has to manage is growing accordingly. These loads are typically controlled using discrete and pulse-width modulated (PWM) outputs from the microcontroller when real-time operation is essential or via SPI when real-time response is not critical. The increase of already high pin-count on microcontrollers, the associated routing effort and demand for connected power stages is a concern of cost and reliability for future ECU designs.

In modern vehicles, the number of small electrical drive systems is still increasing continuously for blowers, fans and pumps as well as for window lifts, sunroofs and doors. Requirements and operating conditions for such systems varies, hence there are many different solutions available for controlling such motors. In most applications, simple, low-cost DC motors are used. For higher requirements regarding operating time and in stop-start capable systems, the focus turns to highly efficient and durable brushless DC motors with electronic commutation. This paper compares various electronic control concepts from a semiconductor vendor point of view. These concepts include discrete control using relays or MOSFETs. Furthermore integrated motor drivers are discussed, including system-on-chip solutions for specific applications, e.g. specific ICs for window lift motors with LIN interface.

This paper will give an overview of multicore in automotive applications, covering the trends, benefits, challenges, and implementation scenarios. The automotive silicon industry has been building multicore and multiprocessor systems for a long time. The reasons for this choice have been: increased performance, safety redundancy, increased I/O & peripheral, access to multiple architectures (performance type e.g. DSP) and technologies. In the past, multiprocessors have been mainly considered as multi-die, multi-package with simple interconnection such as serial or parallel busses with possible shared memories. The new challenge is to implement a multicore, micro-processor that combines two or more independent processors into a single package, often a single integrated circuit (IC). The multicores allow a computing device to exhibit some form of thread-level parallelism (TLP).